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	<title>VIDISONIC &#187; Rend</title>
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	<description>Hardware &#38; Software Design Resources</description>
	<lastBuildDate>Sat, 20 Mar 2010 03:19:45 +0000</lastBuildDate>
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		<title>Lithium Coin-Cell Batteries : Predicting an Application Lifetime</title>
		<link>http://www.vidisonic.com/2010/03/20/lithium-coin-cell-batteries-predicting-an-application-lifetime/</link>
		<comments>http://www.vidisonic.com/2010/03/20/lithium-coin-cell-batteries-predicting-an-application-lifetime/#comments</comments>
		<pubDate>Sat, 20 Mar 2010 03:19:45 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Battery]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=185</guid>
		<description><![CDATA[This application note explains about various contributors to battery capacity consumption in a battery backed application, and how to predict battery lifetime in a system. The issues about how to predict the battery lifetime is eplained in detail in Sample Lifetime Calculations section. This application note is divided into 7 section: Why Battery Backup?, IC [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Reducing PCB Design Costs: From Schematic Capture to PCB Layout</title>
		<link>http://www.vidisonic.com/2010/03/19/reducing-pcb-design-costs-from-schematic-capture-to-pcb-layout/</link>
		<comments>http://www.vidisonic.com/2010/03/19/reducing-pcb-design-costs-from-schematic-capture-to-pcb-layout/#comments</comments>
		<pubDate>Fri, 19 Mar 2010 06:52:45 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[PCB Design]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=180</guid>
		<description><![CDATA[This application note talks about reducing PCB costs from schematic capture to PCB layout. The issues about how to reduce the cost of PCB designs is explained in detail in this note. This application note is divided into 5 section: The basics, Schematic libraries, PCB libraries, The netlist file, and  Save time and avoid errors. [...]]]></description>
		<wfw:commentRss>http://www.vidisonic.com/2010/03/19/reducing-pcb-design-costs-from-schematic-capture-to-pcb-layout/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>12V &#8211; 4A Power Supply</title>
		<link>http://www.vidisonic.com/2010/03/16/12v-4a-power-supply/</link>
		<comments>http://www.vidisonic.com/2010/03/16/12v-4a-power-supply/#comments</comments>
		<pubDate>Tue, 16 Mar 2010 00:16:45 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Power Supply]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=176</guid>
		<description><![CDATA[This is a circuit for 12V &#8211; 4A Power Supply. This circuit uses BD705 and L200. To regulate the output voltage this circuit use the 3.3 k resistor and the 1K potentiometer, PT1. Here is the circuit : From the second figure, we can see the current limitation of this circuit. The trimmer PT2 works [...]]]></description>
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		<slash:comments>2</slash:comments>
		</item>
		<item>
		<title>Understanding Noise in Linear Regulators</title>
		<link>http://www.vidisonic.com/2010/03/12/understanding-noise-in-linear-regulators/</link>
		<comments>http://www.vidisonic.com/2010/03/12/understanding-noise-in-linear-regulators/#comments</comments>
		<pubDate>Fri, 12 Mar 2010 04:10:27 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Noise]]></category>
		<category><![CDATA[Regulator]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=150</guid>
		<description><![CDATA[This  Analog Applications Journal talks about Noise in an LDO, the type of noise, and power supply ripple rejection (PSRR). The issues about noise in analog circuits is explained in detail in this note. The description LDO application is also described in this note. This analog applications journal also talks about the simplified block diagram, [...]]]></description>
		<wfw:commentRss>http://www.vidisonic.com/2010/03/12/understanding-noise-in-linear-regulators/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Power Management for Processor Core Voltage Requirements</title>
		<link>http://www.vidisonic.com/2010/03/10/power-management-for-processor-core-voltage-requirements/</link>
		<comments>http://www.vidisonic.com/2010/03/10/power-management-for-processor-core-voltage-requirements/#comments</comments>
		<pubDate>Wed, 10 Mar 2010 06:11:19 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Power Management]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=153</guid>
		<description><![CDATA[This application notes presents about Power management for processor core voltage requirements. The theory about digital signal processor power requirements is described in detail inside TMS320TCI648x digital signal processor power requirements. The main topic of this application notes is TMS320TCI648x digital signal processor power requirements. The main topic contains Voltage tolerances, noise and transients, Second [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Calibration in Touch-Screen Systems</title>
		<link>http://www.vidisonic.com/2010/03/10/calibration-in-touch-screen-systems/</link>
		<comments>http://www.vidisonic.com/2010/03/10/calibration-in-touch-screen-systems/#comments</comments>
		<pubDate>Wed, 10 Mar 2010 05:35:49 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Touch Screen]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=158</guid>
		<description><![CDATA[This application note explains about Calibration in touch-screen systems. The issue about Calibration in touch-screen systems is presented inside the introduction. The main topic of this application notes is divided into 6 section : Introduction, Touch-coordinate errors, Mathematical expression, Calibration methods, Calibration algorithms, and Algorithm implementation. The section Touch-coordinate errors explains about a measurement of [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Introduction to Phase-Locked Loop System Modeling</title>
		<link>http://www.vidisonic.com/2010/03/10/introduction-to-phase-locked-loop-system-modeling/</link>
		<comments>http://www.vidisonic.com/2010/03/10/introduction-to-phase-locked-loop-system-modeling/#comments</comments>
		<pubDate>Wed, 10 Mar 2010 05:04:41 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Phase-Locked Loop]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=145</guid>
		<description><![CDATA[This application note talks about the Introduction to phase-locked loop system modeling. The issue about linear PLL model is presented after introduction. The main topic of this application note is divided into 5 section : Introduction, A linear PLL model in the continuous-time domain (S-domain), Modeling of digital PLL (DPLL) in the discrete time domain [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>DTL-TTL Controlled Buffered Analog Switch</title>
		<link>http://www.vidisonic.com/2010/03/03/dtl-ttl-controlled-buffered-analog-switch/</link>
		<comments>http://www.vidisonic.com/2010/03/03/dtl-ttl-controlled-buffered-analog-switch/#comments</comments>
		<pubDate>Wed, 03 Mar 2010 21:13:31 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[Switch]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=137</guid>
		<description><![CDATA[This is circuit of  DTL-TTL controlled buffered analog Switch. Due to its low lowleakage and 25ohm rOn, this circuit uses 2N4860 JFET. As a voltage buffer, this circuit uses LM 102. Here is the circuit : A dual trace oscilloscope chopper can adapt this circuit. Adequate  switch drive controlled DTL-TTL logic levels are generated by [...]]]></description>
		<wfw:commentRss>http://www.vidisonic.com/2010/03/03/dtl-ttl-controlled-buffered-analog-switch/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Aspects of Data Acquisition System Design</title>
		<link>http://www.vidisonic.com/2010/02/25/aspects-of-data-acquisition-system-design/</link>
		<comments>http://www.vidisonic.com/2010/02/25/aspects-of-data-acquisition-system-design/#comments</comments>
		<pubDate>Thu, 25 Feb 2010 17:12:09 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[DAQ]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=99</guid>
		<description><![CDATA[This application note explains about aspects of data acquisition system design. The main topic is divided into 7 section : Signal processing challenges Common ADC architectures System requirements Selecting the data converter Interfacing the data converter Signal conditioning op amp selection Issues of board layout The challenges of signal processing is presented in signal processing [...]]]></description>
		<wfw:commentRss>http://www.vidisonic.com/2010/02/25/aspects-of-data-acquisition-system-design/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>Serial A-to-D converters to DSPs Interfacing Methods</title>
		<link>http://www.vidisonic.com/2010/02/25/serial-a-to-d-converters-to-dsps-interfacing-methods/</link>
		<comments>http://www.vidisonic.com/2010/02/25/serial-a-to-d-converters-to-dsps-interfacing-methods/#comments</comments>
		<pubDate>Thu, 25 Feb 2010 17:11:13 +0000</pubDate>
		<dc:creator>Rend</dc:creator>
				<category><![CDATA[Hardware]]></category>
		<category><![CDATA[ADC]]></category>

		<guid isPermaLink="false">http://www.vidisonic.com/?p=98</guid>
		<description><![CDATA[This analog applications journal presents about a methodology of interfacing serial A-to-D converters to DSPs. The theory about serial analog-to digital converters, standard serial interface, serial port general operation are presented in detail after introduction. The main topic is divided into 9 sections : Introduction Serial analog-to-digital converters Standard serial interface Serial port general operation [...]]]></description>
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		<slash:comments>0</slash:comments>
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